2022-12-28 00:59:35 +00:00
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package riscvemu
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2022-12-28 01:11:07 +00:00
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import (
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"math"
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"os"
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)
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2022-12-28 00:59:35 +00:00
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type VirtualEEI struct {
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memPages map[uint32][4096]byte
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2022-12-28 00:59:35 +00:00
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}
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2022-12-28 01:11:07 +00:00
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func NewVirtualEEI() VirtualEEI {
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return VirtualEEI{
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memPages: make(map[uint32][4096]byte),
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2022-12-28 00:59:35 +00:00
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}
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2022-12-28 01:11:07 +00:00
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}
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2022-12-28 01:11:07 +00:00
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func (ve *VirtualEEI) ReadByte(addr uint32) (byte, error) {
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page, _ := ve.memPages[addr>>12]
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return page[addr&0b111111111111], nil
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}
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func (ve *VirtualEEI) Read32(addr uint32) (uint32, error) {
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// n.b. will panic on overflow
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// RISC-V allows 32-bit load/stores to be implemented as either little-endian
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// or big-endian. This is the little-endian version
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page, _ := ve.memPages[addr>>12]
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inPageAddr := addr & 0b111111111111
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return (uint32(page[inPageAddr]) << 24) | (uint32(page[inPageAddr+1]) << 16) | (uint32(page[inPageAddr+2]) << 8) | uint32(page[inPageAddr+3]), nil
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}
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func (ve *VirtualEEI) WriteByte(addr uint32, value byte) error {
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page, ok := ve.memPages[addr>>12]
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// Slices are reference-types, this will write-through into ve.memPages
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page[addr&0b111111111111] = value
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if !ok {
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ve.memPages[addr>>12] = page
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}
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return nil
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}
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func (ve *VirtualEEI) Write32(addr, value uint32) error {
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// n.b. will panic on overflow
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page, ok := ve.memPages[addr>>12]
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inPageAddr := addr & 0b111111111111
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// Slices are reference-types, this will write-through into ve.memPages
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page[inPageAddr] = byte((value >> 24) & 0b11111111)
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page[inPageAddr+1] = byte((value >> 16) & 0b11111111)
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page[inPageAddr+2] = byte((value >> 8) & 0b11111111)
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page[inPageAddr+3] = byte(value & 0b11111111)
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if !ok {
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ve.memPages[addr>>12] = page
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}
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2022-12-28 00:59:35 +00:00
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return nil
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}
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func (ve *VirtualEEI) Syscall() {
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panic("syscall")
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}
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func (ve *VirtualEEI) Trap() (bool, error) {
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panic("trap")
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}
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